Absorbing boundary conditions for compact modeling of on‐chip passive structures
ISSN: 0332-1649
Article publication date: 1 July 2006
Abstract
Purpose
The paper has the purpose of proposing a new open boundary condition to be used in conjunction with the finite integration technique (FIT) for the modelling of passive on‐chip components.
Design/methodology/approach
This boundary condition is ensured by using a virtual layer that surrounds the computational domain.
Findings
The paper proves which are the optimal material properties of the equivalent layer of open boundary.
Practical implications
When modelling passive on‐chip components with FIT, the method proposed is more efficient than the strategic dual image technique.
Originality/value
The paper shows the advantage of this approach – that the analysis algorithm remains unchanged, while saving the field‐circuit compatibility properties, such as current conservation.
Keywords
Citation
Ioan, D., Ciuprina, G. and Radulescu, M. (2006), "Absorbing boundary conditions for compact modeling of on‐chip passive structures", COMPEL - The international journal for computation and mathematics in electrical and electronic engineering, Vol. 25 No. 3, pp. 652-659. https://doi.org/10.1108/03321640610666817
Publisher
:Emerald Group Publishing Limited
Copyright © 2006, Emerald Group Publishing Limited