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Design/methodology/approach – How the analytical techniques used for physical and chemical analysis, which include X-ray radiography, optical microscopy and scanning electron microscopy/energy dispersive X-ray spectroscopy, are used.
Findings – Examples from recent case studies are given to illustrate the work.
Originality/value – The paper demonstrates how the failure analysis of an electronic component or interconnection system is conducted, and what can be learnt from the investigation.
1 Introduction
This paper demonstrates the advantages of operating a central corporate investigative service for resolving major costly electronic product issues. The Product Assurance Response Centre (PARC) was created approximately ten years ago with a view to providing rapid investigations of component and product failures. It was appreciated that an in-house facility would afford a deeper understanding of the root cause of electronic failures, avoid duplication of effort across the business, and produce a vast information knowledge base accessible to all clients.
To illustrate the typical analytical approach adopted, and the benefit of the outcome from over 6,000 investigations already undertaken in PARC, this paper describes some representative failure events. These demonstrate the benefits of operating a novel dedicated multidisciplinary facility, (chemistry, physics, metallurgy and engineering) capable of addressing the breadth of electronic failures associated with complex state-of-the-art defence and aerospace products, particularly integrated circuits, printed circuit board assemblies and hybrid devices.
Various analytical techniques are used to determine the cause of a failure; these include optical microscopy, X-ray radiography (Figure 1) (Hellier, 2001) and scanning electron microscopy (SEM), with energy dispersive X-ray spectroscopy (EDX) for the determination of the elemental composition of materials (Figure 2) (Goldstein et al., 1992).
2 Silicon integrated circuits
Common causes of failure in silicon integrated circuits are over voltage caused by electrostatic discharge (Vinson and Liou, 1998) or supply voltage transients and over current caused by short circuits elsewhere in the system (Galler et al., 1999; Martin, 1999). The symptoms of these failure modes are quite distinct and easy to identify.
2.1 Over voltage
Over voltage refers to the presence of a voltage sufficiently high to damage or destroy a device by causing it to operate outside its allowed voltage range. This usually results in some physical damage to the circuitry, which can be observed. The over voltage can result in holes in the insulating layers used in device construction. The amount of damage depends on the energy or heat generated at the fault site.
The first example is a CMOS integrated circuit device that was giving a faulty output on one particular pin. The ceramic package was opened to expose the silicon chip, which was examined using a combination of optical microscopy and SEM.
The damaged circuitry was examined in detail using a scanning electron microscope (Figure 3).
The debris around the holes consists of melted silicon indicating that a voltage surge, which generated heat due to the flow of a high current, was responsible for the failure.
The second example concerns an operational amplifier, which was examined using X-ray radiography and optical microscopy. The X-ray images showed that the silicon chip was misaligned in the package. However, this was not the cause of the fault. Further examination using under an optical microscope and a scanning electron microscope showed that the damage was due to over voltage (Figure 4). EDX was then used to show that the debris consisted of silicon and aluminium.
A failed surface mount oscillator is shown in Figure 5. The heat generated by the passage of a high current has melted the aluminium metallisation and the silicon nitride layer to expose the silicon oxide layers underneath.
Similar damage to an operational amplifier is shown in Figure 6.
Damage to a silicon chip used as a temperature sensor is shown in Figure 7.
The deep hole in the silicon is typical of the damage suffered as a result of a large voltage spike.
2.2 Over current
Over current conditions can produce sufficient heat to melt or vaporise bond wires and metallisation on the silicon chip. The magnitude and duration of the event will determine whether the bond wire or the device metallisation will melt first.
A programmable logic device was found to have suffered from an over current event resulting in two of the aluminium bond wires melting and welding together (Figures 8 and 9).
Gold and aluminium bond wires are both excellent thermal conductors so that the ends of the wire where it is attached to the chip or the package will be the coolest points. As a result the highest temperature and the most common failure location will be at the centre of the span of the wire. Long duration low-current events result in bond wires melting, whereas short duration high-current pulses tend to melt the metallisation first.
2.3 Mechanical damage
Damage to bond wires can also occur during the bonding operation. Figure 10 shows mechanical damage to a gold wire as a result of poor machine control. The operation used to form the wedge bond has resulted in damage to the wire.
Another common problem in ultrasonic wedge bonding are cracks which sometimes appear in the heal of the wedge. The motion of the bond head forms these after the wedge bond is formed. The tool may rise too high or come off at an angle that overworks the wire and causes a crack to form (Figure 11).
3 Printed circuit boards
3.1 Delamination and cracks in plated through holes
Multilayer printed circuit boards are used in electronic equipment where they act as the interconnection medium for a variety of components including integrated circuits and other silicon devices, hybrids and passive components like resistors and capacitors. The faults found in printed circuit boards are often associated with the plated through holes or the incorrect use of materials. An example of this is shown in a 13-layer motherboard that exhibited cracks in the centre of the plated through holes. Microsections were made of the printed circuit board, and examined using optical and SEM.
The photographs of the printed circuit boards have been taken after the tin-lead re-flow process and some of the fissures in the plated through holes have been filled with tin-lead alloy during this procedure. In other areas, plating solution from the various electroplating processes has crept along a fissure and deposited metal behind the plated through hole copper layer into a void between the copper and the glass fibre epoxy laminate (Figure 12). Images taken with a scanning electron microscope show that the cracks in the plated through holes originate as the result of delamination between the layers in the glass fibre epoxy laminate (Figures 13 and 14).
The fissures in the laminate are the result of thermal stresses and were overcome by using a glass fibre-epoxy prepreg with a higher glass transition temperature Tg, (Smith, 1986) and smaller Z-axis expansion, as the bonding layer.
3.2 Poor solder joints
An X-ray image of several solder ball terminations from an integrated circuit package on a printed circuit board is shown in Figure 15. The balls are 440 μ in diameter, and the voids are 100 μ in diameter. Figure 16 shows a microsection of a particularly large void in a solder ball.
A further example of a poor solder joint is shown in Figure 17. This joint shows voids and a circular crack. Figure 18 shows a crack between an integrated circuit package J lead and a printed circuit board, which was investigated for evidence of embrittlement of the solder joint using the EDX facility on the scanning electron microscope to search for gold. In this case, the absence of a significant amount of gold meant that other factors were considered to be the cause of the failure.
4 Incorrect use of components
4.1 The polarity of capacitors
Tantalum capacitors of several hundred microfarads are available in surface mount packages and can fail catastrophically if they are soldered to printed circuit boards with the incorrect polarity. X-ray radiography has been used to determine the polarity of suspect capacitors on hybrids (Figure 19) and printed circuit boards (Figure 20) without the need to remove the components.
The X-ray images clearly show the anode of the tantalum capacitor. In these examples the capacitors were shown to have the correct polarity.
Surface mount ceramic capacitors that are subjected to thermal and mechanical shock can develop cracks, resulting in a drop in the value of their capacitance. These components have two sets of interleaved metallisation that forms the plates. If a crack extends between plates of opposite polarity the dielectric breakdown voltage will decrease and the capacitor will short out when a voltage is applied to it. Figure 21 shows an example of large cracks in the barium titanate dielectric layer of a capacitor.
5 Electronic devices on ceramic substrates
5.1 Broken bond wires
The bond wires on a thick film hybrid (Figure 22) which are protected by a glob top of epoxy resin may be examined using X-ray radiography to look for breaks.
5.2 Blisters in microwave circuits
A microwave circuit consisting of gold tracks and gold plated via holes on an alumina substrate showed apparent poor adhesion of the gold plated layer in the via has resulted in the formation of blisters (Figure 23) which have subsequently split. A section through the via, however, revealed that the blister was not due to poor adhesion but cohesive failure of the alumina.
5.3 Corrosion of tracks
A hybrid with several integrated circuits and resistor networks was found to have failed as the result of corrosion of the resistor tracks (Figure 24).
Chemical analysis of the stained area surrounding the corroded tracks using an infrared microscope attached to a Fourier transform infrared spectrometer, indicated the presence of an organic compound, possibly a corrosive agent like ethanolamine, H2N (CH2)2 OH, which is used in cleaning solutions.
6 Conclusion
Several examples of the failure analysis of electronic components and interconnection systems are given. These illustrate the broad range of work undertaken and the nature of many of the failures investigated. The information gained is fed back to the manufacturing units in order to prevent a re-occurrence of the fault, and so enhance product reliability. This has resulted in savings to BAE SYSTEMS of several million pounds in terms of the decrease in lost productivity, poor quality and customer returns over the lifetime of the PARC. The return on investment in 2005 was in excess of four million pounds.
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C.A. Smith is a Materials Scientist working on the failure analysis of electronic components and interconnection systems in the Product Assurance Response Centre (PARC) at BAE SYSTEMS, Great Baddow, Chelmsford. After graduating in chemistry, he has worked in the electronics industry for almost 30 years, where he has been involved in research and development on materials, processes and devices, and the manufacture of multilayer printed circuit boards and liquid crystal displays. He is a Chartered Scientist, Chartered Chemist, and a Fellow of the Royal Society of Chemistry. C.A. Smith can be contacted at: colin.a.smith@baesystems.com |