The processing time optimization of printed circuit board
Abstract
Purpose
The purpose of this paper is to demonstrate the optimization of printed circuit board (PCB) manufacturing by improving drilling process productivity.
Design/methodology/approach
Two different ways are explored to increase the productivity of the PCB drilling operation. The first way involves the minimization of the cutting‐tool path length. The second way to achieve the objective explores the efficiency of processing stacked PCBs.
Findings
To reduce the tool path length between the holes of a PCB, a heuristic hybrid algorithm to solve the traveling salesman problem (TSP) is briefly described. Also, a mathematical model to calculate the total processing time is proposed. Based on this model, the paper shows the optimal number of stacked PCBs that can be profitably processed, while high processing productivity does not always mean high number of stacked PCBs.
Research limitations/implications
The paper does not treat the optimization of the drilling process parameters, even if reduction of the drilling time using optimized cutting parameters also represents an efficient method for improving the productivity.
Originality/value
The paper shows the influence of the algorithm performance for solving the TSP on the processing time minimization, by decreasing the component of drill movement time along the drill path between holes. Additionally, the conditions in which stacking a specific number of PCBs is advantageous are also investigated. Furthermore, the paper shows how to determine the optimum number of stacked PCBs.
Keywords
Citation
Ancău, M. (2009), "The processing time optimization of printed circuit board", Circuit World, Vol. 35 No. 3, pp. 21-28. https://doi.org/10.1108/03056120910979512
Publisher
:Emerald Group Publishing Limited
Copyright © 2009, Emerald Group Publishing Limited