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Cu filling of TSV using various current forms for three‐dimensional packaging application

Myong‐Hoon Roh (Department of Materials Science and Engineering, University of Seoul, Seoul, Republic of Korea)
Jun‐Hyeong Lee (Department of Materials Science and Engineering, University of Seoul, Seoul, Republic of Korea)
Wonjoong Kim (Department of Materials Science and Engineering, University of Seoul, Seoul, Republic of Korea)
Jea Pil Jung (Department of Materials Science and Engineering, University of Seoul, Seoul, Republic of Korea)

Soldering & Surface Mount Technology

ISSN: 0954-0911

Article publication date: 13 September 2013

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Abstract

Purpose

The purpose of this paper is to overview the effect of electroplating current wave forms on Cu filling of through‐silicon‐vias (TSV) for three‐dimensional (3D) packaging.

Design/methodology/approach

The paper takes the form of a literature review.

Findings

Effective TSV technology for 3D packaging involves various processes such as via formation, filling with conductive material, wafer thinning, and chip stacking. Among these processes, high‐speed via filling without defect is very important for applying the TSV process to industry with a lower production cost. In this paper, the effects of various current forms on Cu electroplating of TSV such as direct current (DC), pulse current (PC), pulse reverse current (PRC), and periodic pulse reverse current (PPR) are described in detail including recent studies.

Originality/value

TSV is a core technology for high density 3D packaging. This paper overviews the recent studies of various current forms on Cu‐filling of TSV.

Keywords

Citation

Roh, M., Lee, J., Kim, W. and Pil Jung, J. (2013), "Cu filling of TSV using various current forms for three‐dimensional packaging application", Soldering & Surface Mount Technology, Vol. 25 No. 4, pp. 209-217. https://doi.org/10.1108/SSMT-04-2013-0011

Publisher

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Emerald Group Publishing Limited

Copyright © 2013, Emerald Group Publishing Limited

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