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<title>Soldering &amp; Surface Mount Technology  </title>


<link>http://www.emeraldinsight.com/0954-0911.htm</link>
<description> Table of Contents from the most recently published issues of Soldering &amp; Surface Mount Technology</description>
<language>en-us</language>
<copyright>2009 Emerald Group Publishing Ltd.</copyright>
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<title>Soldering &amp; Surface Mount Technology </title>
<url>http://www.emeraldinsight.com/info/pics/journals/ssmt-cover-xix.gif</url>
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<title>Edge tail length effect on reliability of DBC substrates under thermal cycling : Table of Contents</title>
<link>http://www.emeraldinsight.com/10.1108/09540910910970367</link>
<description> &lt;B&gt;Abstract:&lt;/B&gt;&lt;BR/&gt; &lt;B&gt;Purpose&lt;/B&gt; &#150; Direct-bond-copper (DBC) substrates crack after about 15 thermal cycles from -55 to 250°C. The purpose of this paper is to study the phenomenology of thermal-cracking to determine the suitability of DBC for high-temperature packaging. &lt;B&gt;Design/methodology/approach&lt;/B&gt; &#150; The thermal plastic strain distribution at the edge of the DBC substrate was analyzed by using a finite element method with the Chaboche model for copper. The parameters of the Chaboche model were verified by comparing with the three-point bending test results of DBC substrate. The thermal analyses involving different edge tail lengths indicated that susceptibility to cracking was influenced by the edge geometry of the DBC substrate. &lt;B&gt;Findings&lt;/B&gt; &#150; Interface cracking was observed to initiate at the short edge of the bonded copper and propagated into the ceramic layer. The interface crack was caused by the accumulation of thermal plastic strain near the short edge. The edge tail can decrease the thermal strain along the short edge of the DBC substrate. Thermal cycling lifetime was improved greatly for the DBC substrate with 0.5?mm edge tail length compared with that without edge tail. &lt;B&gt;Research limitations/implications&lt;/B&gt; &#150; The thermal cracking of DBC substrates should be studied at the microstructure level in the future. &lt;B&gt;Originality/value&lt;/B&gt; &#150; Thermal cycling induced failure of DBC was analyzed. A method of alleviating the thermal plastic strain distribution on the weakest site and improving the thermal fatigue lifetime of DBC substrates under thermal cycling was proposed.</description>
<author>Guangcheng Dong, Guangyin (Thomas) Lei, Xu Chen, Khai Ngo, Guo-Quan Lu</author>
<pubDate>Sun Jun 21 14:15:05 BST 2009</pubDate>
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<title>Six sigma analysis of SMD feeding parameters and board assembly quality : Table of Contents</title>
<link>http://www.emeraldinsight.com/10.1108/09540910910970402</link>
<description> &lt;B&gt;Abstract:&lt;/B&gt;&lt;BR/&gt; &lt;B&gt;Purpose&lt;/B&gt; &#150; Little interest has been shown in pickup conditions and parameters and their effect on placement accuracy in the literature before. The purpose of this paper is to find out the possible link between pickup conditions and placement accuracy of typical discrete chip components. &lt;B&gt;Design/methodology/approach&lt;/B&gt; &#150; A dedicated test board was developed and used to study the ultimate critical pickup conditions. Then the same board was used to find out the best parameters between ultimate conditions and perfect conditions in order to define working limits for good enough pickup that would work well in practice. &lt;B&gt;Findings&lt;/B&gt; &#150; The link between pickup conditions and placement quality was found and converted into measurable controllable values. Additionally, a problem was surprisingly detected in the placement machine's vision performance resulting in inaccuracy, and parameters were re-defined to avoid this problem in real-world production. Based on all the findings, the best parameters were defined for component pickup. &lt;B&gt;Originality/value&lt;/B&gt; &#150; This paper discusses the effect of component pickup conditions on accuracy which is seldom handled in the literature. Owing to smaller spacing between chip components in the future, pickup is becoming more important; components will simply have to be picked up more and more on the centre to avoid collision with components already been placed. This paper clearly shows the requirement for placement machine manufacturers to develop more accurate pickup tools for the future.</description>
<author>Pekka Kytösaho, Timo Liukkonen</author>
<pubDate>Sun Jun 21 14:15:05 BST 2009</pubDate>
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<title>Effect of substrate material and thickness on reliability of ACA bonded flip chip joints : Table of Contents</title>
<link>http://www.emeraldinsight.com/10.1108/09540910910970376</link>
<description> &lt;B&gt;Abstract:&lt;/B&gt;&lt;BR/&gt; &lt;B&gt;Purpose&lt;/B&gt; &#150; The purpose of this paper is to investigate the effect of substrate material and thickness on the thermal cycling reliability of flip chip joints assembled with anisotropic conductive adhesives (ACA). &lt;B&gt;Design/methodology/approach&lt;/B&gt; &#150; Four test lots are assembled using three different substrates. Two of the substrates are made of FR-4. The thicknesses of these substrates are 600 and 100?&lt;IT&gt;µ&lt;/IT&gt;m. The third substrate is made of liquid crystal polymers (LCP) and is flexible. With the thicker FR-4 substrate two test lots are assembled using both normal and two-step bonding profiles to study how the bonding profile affects the deformation of the substrate. Four different bonding pressures are used to study the effect of pressure on reliability and the failure mechanism of the ACA joints. The reliability of the test samples is studied using a temperature cycling test. &lt;B&gt;Findings&lt;/B&gt; &#150; The reliability of the test lot with the LCP substrate is considerably better than that of the test lots with the FR-4 substrates. Additionally, the thinner FR-4 substrate has better reliability than the thicker FR-4 substrate. The failure mechanisms found varied among the test lots. The effect of the two-step bonding process on the deformation of the substrate is found to be minor compared with the effect of the glass fibres. &lt;B&gt;Originality/value&lt;/B&gt; &#150; The work shows that the thermal cycling reliability of ACA flip chip joints is markedly influenced by the thickness and material of the substrate. It is also seen that the substrate used influences the failure mechanisms formed during thermal cycling testing.</description>
<author>Laura Frisk, Anne Cumini</author>
<pubDate>Sun Jun 21 14:15:05 BST 2009</pubDate>
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<title>Composite coating structure in an implantable electronic device : Table of Contents</title>
<link>http://www.emeraldinsight.com/10.1108/09540910910970385</link>
<description> &lt;B&gt;Abstract:&lt;/B&gt;&lt;BR/&gt; &lt;B&gt;Purpose&lt;/B&gt; &#150; The purpose of this paper is to investigate the influence of composite coating structure on the reliability of adhesive flip chip joints. The need for conformal coating is considered, especially for medical applications, and medical sterilization is also considered. &lt;B&gt;Design/methodology/approach&lt;/B&gt; &#150; Two test lots were assembled and one of them was sterilized using gamma sterilization. Both test lots were coated first with epoxy and then with Parylene C, resulting in a composite coating structure. The reliability was studied using a constant humidity test and the failure analysis was performed with cross-sections and scanning electron microscopy analysis. These results were compared to earlier research results on conformal coatings. &lt;B&gt;Findings&lt;/B&gt; &#150; The reliability of both test lots proved to be good. The composite coating structure shields the joints from humidity and improves the reliability compared to non-coated test samples. When the conformal coating was compared to the pure Parylene C coated test lot, the reliability was almost the same. This leads to the conclusion that the epoxy layer in the composite coating structure has no value when long-term reliability is considered. Gamma sterilization does not greatly affect reliability. The epoxy coating under the Parylene C layer cracked during reliability testing. &lt;B&gt;Originality/value&lt;/B&gt; &#150; The paper shows the influence of composite coating structure on the reliability of adhesive flip chip joints, particularly important in medical applications.</description>
<author>Kati Kokko, Hanna Harjunpää, Pekka Heino, Minna Kellomäki</author>
<pubDate>Sun Jun 21 14:15:05 BST 2009</pubDate>
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<title>Effect of multiple reflow cycles on ball impact responses of Sn-Ag-Cu solder joints : Table of Contents</title>
<link>http://www.emeraldinsight.com/10.1108/09540910910970358</link>
<description> &lt;B&gt;Abstract:&lt;/B&gt;&lt;BR/&gt; &lt;B&gt;Purpose&lt;/B&gt; &#150; The purpose of this paper is to report the effect of multiple reflow cycles on ball impact test (BIT) responses and fractographies obtained at an impact velocity of 500?mm/s on Sn-4Ag-0.5Cu solder joints. &lt;B&gt;Design/methodology/approach&lt;/B&gt; &#150; Solder balls were mounted on copper substrate pads with immersion tin surface finish, supplied by two vendors. For these particular test vehicles and test conditions, fracture near the interface between the interfacial Cu&lt;DN&gt;6&lt;/DN&gt;Sn&lt;DN&gt;5&lt;/DN&gt; intermetallic compound (IMC) and copper pad was identified as the only failure mode induced by BIT. &lt;B&gt;Findings&lt;/B&gt; &#150; Measurement results indicate that BIT characteristics in general degrade as the number of reflow cycles increases. Furthermore, scanning electron microscopy observations show that the thickness and grain size of interfacial Cu&lt;DN&gt;6&lt;/DN&gt;Sn&lt;DN&gt;5&lt;/DN&gt; increase with increasing number of reflow cycles. This correlation confirms the familiar notion that a thicker Cu&lt;DN&gt;6&lt;/DN&gt;Sn&lt;DN&gt;5&lt;/DN&gt; degrades the interfacial strength. &lt;B&gt;Originality/value&lt;/B&gt; &#150; There are few reports that can attribute failure directly to the IMC(s) at the interface. This paper, however, successfully correlates the weakening solder joints with the thickening and shape changes of IMC(s) in a direct way.</description>
<author>Yi-Shao Lai, C.R. Kao, Hsiao-Chuan Chang, Chin-Li Kao</author>
<pubDate>Sun Jun 21 14:15:05 BST 2009</pubDate>
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<title>Reliability analysis of a novel fan-out type WLP : Table of Contents</title>
<link>http://www.emeraldinsight.com/10.1108/09540910910970394</link>
<description> &lt;B&gt;Abstract:&lt;/B&gt;&lt;BR/&gt; &lt;B&gt;Purpose&lt;/B&gt; &#150; The wafer level package (WLP) is a cost-effective solution for electronic packaging and has been increasingly applied in recent years. The purpose of this paper is to propose a newly developed packaging technology, based on the concepts of the WLP, the panel base package (PBP) technology, in order to further obtain the capability of signal fan-out for fine-pitched integrated circuits (ICc). &lt;B&gt;Design/methodology/approach&lt;/B&gt; &#150; In the PBP, the filler material is selected to fill the trench around the chip and provide a smooth surface for the redistribution lines. Therefore, the solder bumps could be located on both the filler and the chip surface and the pitch of the chip side is fanned-out. The design concept and the manufacturing process of the PBP would first be described in this study. The three-dimensional finite element model is established based on the real testing sample and the thermo-mechanical behavior of the PBP is simulated. &lt;B&gt;Findings&lt;/B&gt; &#150; It is found that the solder joint reliability of the PBP can be highly improved because of the applied stress buffer layer. However, the accumulated stress/strain from the coefficient of thermal expansion mismatch may transfer to the metal lines in package. In order to enhance the robustness of the redistribution lines, the bypassed type interconnect is suggested. Moreover, the trace/pad connecting junction and the conductive via which have smooth outline are preferred to avoid stress concentration effects. &lt;B&gt;Originality/value&lt;/B&gt; &#150; In this paper, a low-cost and short time-to-market packaging technology is proposed which is especially suitable for high density IC devices. The PBP technology has the ability to meet the requirements of major reliability testing conditions and it will have a high potential for application in the near future.</description>
<author>Ming-Chih Yew, Mars Tsai, Dyi-Chung Hu, Wen-Kun Yang, Kuo-Ning Chiang</author>
<pubDate>Sun Jun 21 14:15:05 BST 2009</pubDate>
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