EIPC Spring Conference Review

Citation

Goosey, M. (2003), "EIPC Spring Conference Review", Circuit World, Vol. 29 No. 1. https://doi.org/10.1108/cw.2003.21729aab.002

EIPC Spring Conference Review

EIPC Spring Conference Review

"Strategies for Survival in the PCB Industry", Rome, 18th and 19th April 2002

Keywords: EIPC, Conference, PCBs

This year the European Institute of Printed Circuits (EIPC) held its Spring Conference in Rome and the theme, quite appropriately, was "Strategies for Survival in the PCB Industry". The conference was organised in collaboration with Produttori Italiani Circuiti Stampati per L'Electtronica (PICSEL), the trade body representing the Italian PCB industry and it was specifically aimed at delegates based in the South of Europe. The conference's objective was to inform participants about the current status of an industry which was encountering one of the worst downturns in living memory. Spread over 2 days, the conference was divided into four sections covering the business and market outlook, technology innovation, high density interconnect and process technology, and Materials and Process Technology. There were 19 presentations from a wide range of industry experts.

The first session on the business and market outlook was opened with a presentation from Jo Warnier, the EIPC's executive director, who outlined the EIPC's current activities and the increasing number of member services it was lanning to implement in the near future. These included the provision of marketing, technical, statistical and political support. The EIPC now has over 200 members and is the organiser of the Electronic Circuits World Convention that is taking place in Cologne during October this year. The conference will have 75 paper presentations and over 100 posters. More information about the EIPC and its activities can be found on its Web site at www.eipc.org

The main part of the conference then began with a paper on the Global Electronics Industry Business Outlook by Walt Custer of Custer Consulting. In his inimitable, erudite and entertaining manner, Walt shared some of the latest data he had collected to illustrate the current status of the industry and to review business conditions. Although the global economy grew by 1.1 per cent in 2001, global demand for electronic equipment dropped by 14 per cent from 2000 to 2001. The reasons for this decline were related to a combination of factors including industry inventory corrections, failure of many "DOTCOM" companies, rising interest rates, the economic downturn and the events of September 11th. Within the overall decline in electronics, rigid PCB production fell by 22 per cent while, overall, semiconductors fell 32 per cent and DRAMs by ~75 per cent. In April 2002 the figures were said to be still fairly negative, but the PCB industry's book to bill ratio was now at 1.0, giving an indication that business may soon be starting to grow again. Walt confirmed that the electronics industry would indeed grow and highlighted that there were many areas where real growth would occur, such as in electronic video games and in devices supporting the internet.

Paul Waldener then presented a paper on behalf of Dr. Konrad Wundt that detailed work undertaken and reported in the European Technology Roadmap known as the "Trend Report". This work, produced in 1999 by approximately 40 German companies, seeks to identify how the European PCB Industry will develop and contains data and information supplied from the whole supply chain. The report details future market requirements and drivers and a key finding was that there would be a strong trend towards microvia technology with more than one layer. Achieving improved registration was found to be key to the adoption of high density interconnect and this was a common theme that was echoed in other presentations during the conference. The trend report was produced in a similar format to the IPC roadmap in order to allow comparisons to be made. Copies can be obtained from the EIPC.

There then followed two papers on the themes of surviving in the poor business climate and on achieving success. The first of these papers, entitled "Find the key focal points for success", was given by Rudi Burkhard, a consultant who described the importance of identifying constraints within a manufacturing process. By finding and eliminating, or working round, these rate determining steps, it was possible to increase a company's performance. The second of these two papers, entitled "Storm proofing your business: six survival tactics for surviving the PCB downturn", was presented by Michael Schumacher. Micheal reiterated the challenges facing the PCB industry such as increasing global competition and the fact that PCBs were becoming a commodity. In order to survive, the industry needed to change its business culture. The six tactics the industry need to adopt were stated as follows; articulate the mission, clean up the books, reinvent the business process, automate through technology, implement cost control and develop business alliances. It was also stated that a good way of developing these types of alliances was through supply chain integration.

The next session on technology innovation began with a presentation by Paul Waldener of Multiline entitled "Doing Better in the Printed Circuit Industry by improving technology". Paul highlighted the importance of such factors as utilising capacity more effectively and minimising material waste, with special reference being made to board utilisation. On this latter topic Paul described the benefits of reducing the boarder size on panels and of using "Bonding Registration" to avoid the need for pin holes. The use of "Return on Investment" was described as a useful technique for highlighting possible performance improvements. It was also explained that, despite the current difficult times, the European industry still possessed some specific advantages in certain areas. There were also said to be several areas of technology where there were opportunities to produce higher gross margin products.

Steve Jones, of Invotek then presented a paper on "Enhanced Technical Strategies". This paper reintroduced the themes of errors and registration. At the beginning of the presentation Steve emphasized the drift in PCB fabrication to the far east and stated that even high technology boards were now being produced there. He stated that high volume PCB fabrication was effectively lost to the far east. However, it was also true that OEM's valued the benefits of having a local source of supply and this was particularly true for boards destined for the defence and aerospace sectors. One way to enhance efficiency was to increase the size of the panels being processed. The remainder of the presentation then focussed on the possibility of larger registration errors occurring with larger panels and the contribution made to these by photoplotter and artwork materials. The influence of humidity and the importance of humidity control were also highlighted. The benefits of using laser direct imaging and pinless bonding were highlighted. Boards with 26 layers had been bonded successfully without any problems and it was quite likely that boards with even higher layer counts could be produced using this technique.

The first day of the conference concluded with a description of Viasytem's innovative Coaxial Technology by Martin Cotton. With a paper entitled "Coaxial Technology PWBs! The challenge for optical PWB's", Martin detailed a new copper based micromachining technique that is being developed to handle high frequency signals and which offers a total EMC shield around the signal carrying conductors. As signal operating frequencies increase, coaxial EMC shielding is becoming increasingly difficult to achieve, as is maintenance of signal integrity. The method developed by Viasytems uses a carbon dioxide laser to form trenches in FR4 or Aramid substrates that are subsequently metallised to provide a 360° shield around individual conductors or groups of conductors. By pro- viding such a capability, it was suggested that this so-called microcoax technology would obviate the need to use optical interconnect for certain applications.

The first presentation of the next session was entitled "Evolution of interconnection and packaging technologies for highly integrated applications" and was presented by Vincento Motta of STI. The presentation began with details of the evolution of semiconductor packaging to the current position where packages with 2000 I/Os capable of handling bandwidths of 10-40 Gb/s were now being specified. Some of the innovative solutions being developed to enhance packaging densities, such as the use of 3-D packages were then discussed. By adopting a 3D approach with stacked chips etc., it was possible to obtain area utilisations of greater than 100 per cent. The possibility of pyramidal stacking of devices was illustrated although many other possibilities existed. One problem with the stacking of chips was that it was not possible to increase the thickness of the overall package and thus it might be necessary to thin individual devices. However, this type of approach was predicted to become increasingly popular in the near future as it allowed overall numbers of I/Os to be reduced, and boards to become smaller and simpler. STI planned to additionally integrate optical interconnects into this type of package by 2004. It was stated that this "System in a Package" approach offered a viable alternative to "System on a Chip".

Tarja Rapala, (see Plate 1) of Aspocomp, Finland, then presented "Status and future of HDI-PWBs" in which she detailed her company's evaluations of various approaches to embedded component technology. In 2001, Aspocomp were producing boards with 75 micron lines and spaces, yet the surface of the boards was increasingly required for accommodating growing numbers of passive components. In one example it was stated that passives represented 91 per cent of the total number of components on a board, 29 per cent of the solder joints, and 41 per cent of the area, yet only 2.6 per cent of the value. Embedding components into the board offered the potential of improved electrical performance, improved reliability, fewer solder joint and lower costs. Components to be embedded included resistors, capacitors and inductors and Aspocomp were evaluating three different technologies and seven material types as possible candidates for embedding resistors. In addition to having suitable materials and processes, the importance of having an established infrastructure in place between designers, suppliers, board makers and end users was emphasised. The typical application for embedded resistors was as pull up and pull down resistors with values in the 20-20 kv range and power dissipations of 10-60 mW. Aspocomp were also examining the ceramic thick film route for depositing components. This process had the advantage of allowing different pastes to be applied on to a single layer without any waste (i.e. no plating or etching was required) but a disadvantage was that the pastes needed to be fired at ~900°C. A wide range of values could be achieved and the deposited materials were easily trimmed. Another approach being evaluated was based on the deposition of a carbon containing paste onto a conventionally patterned innerlayer. In this case the paste was cured at between 100 and 140°C, a temperature compatible with conventional PCB processing. The same advantages were possible as those achieved with the ceramic thick film route, although trimming was essential in order to achieve certain tolerances.

Plate 1 Tarja Rapala

Nickel plating was the third method being evaluated and this method required the use of an additive process to deposit nickel onto a patterned inner layer. This was described as a straight- forward process but it did require the use of additional processing stages and the subsequent generation of additional chemistry waste. Resistance values of 50-100 w were achieved using this method.

More general requirements of an embedded component process were then discussed. The temperature coefficient of resistance was a very important property that must be both known and small over typical operational ranges. The embedded components must be compatible with, and not affected by, any subsequent multilayer processing steps such as plating, drilling and pressing. Also, the cost of embedding components must compete favourably with the costs of a more conventional surface mount route. Materials requirements were also discussed and Aspocomp were evaluating both reinforced and non- reinforced materials. Laser drilling of FR4 laminates gave rather rough hole walls but the quality of the holes could be significantly improved by optimising the laser drilling conditions. A new laser drillable glass reinforced laminate was also being evaluated and Aramid reinforced substrates had been shown to give good plated metal peel strengths. The presentation concluded with a re-emphasis of the importance of good collaboration across the supply chain in ensuring the successful implementation of buried components.

Roland Menzel of DuPont AFS then gave a presentation entitled "Sequential versus Parallel Processing of HDI layers for advanced microvia PCBs" in which he discussed the advantages of using his company's Aramid based Thermount materials as an alternative reinforcement in PCB substrates. The presentation began with examples of the reductions in device pitch that the PWB industry was increasingly having to accommodate. BGA ball pitch had reduced from 0.8 to 0.5 mm and could well move to 0.4 mm. These tighter pitches required the use of substrates with lower thermal expansion coefficients and better thermal stabilities. Various types of microvias were then shown and a comparison made between glass reinforcement and Aramid reinforcement. Roland introduced various build-up processes that used both plating and polymer thick film techniques. The Japanese ALIVH process was cited as one that uses organic reinforcement in all layers. The ALIVH was described as a parallel process with the additional advantage that it was easy to embed passive components. Aramid reinforcement of a substrate was also capable of giving much smoother topography as it was non-woven.

The first session of the day then finished with a paper by Guiseppe Mola from ACD Technology's, Cedal Division called "Evolution in Lamination and Optimisation for Multilayer Processes". This presentation focussed on a description of his company's new "Adera" laminating press which offered a new concept for the lamination of multilayer and base materials. The novel feature of this press was that it was purely electrically heated with temperature control being assigned to a personal computer. The press used copper foils as the heating elements and anodised aluminium press plates as the insulators. The press worked well with both riveted and bonded stacks of boards and could accommodate stacks of up to 90 panels compared with around 10 for a conventional press. Temperature control was achieved by using thermocouples inside the stack and this enabled much more uniform temperatures to be achieved throughout the stack. More uniform curing temperatures led to less variation in cured laminate glass transition temperatures across the panels. Pressure was applied via an air bag and was approximately one half of that used in a conventional press. This reduced pressure reduced resin outflow giving better thickness control.

The next session of the conference began with "Innovative technologies in testing, legend and solder mask printing" from Adriano Blason of New System srl. In this presentation he described some of his company's products that offered new approaches to both testing and printing. A flying grid test technology was described in which both capacitative and resistive test modes were utilised. He also discussed an ink jet legend printer that avoided the use of screens and their subsequent cleaning. There was also no waste generated and thus the process was both clean and environmentally friendly. The unit could also be used for solder mask printing.

There then followed a presentation by Brewster Barclay of Orbotech in which he gave a non- partisan update and technology status review of Laser Direct Imaging (LDI). Brewster began his presentation by stating that there were almost 50 LDI systems currently installed globally and that Europe was taking a clear lead in the implementation of this technology. Companies were adopting LDI because it was versatile enough to process anything from small prototype lots to large numbers. It was compatible with high layer counts and high technology boards and could process between 30 and 120 panels per hour depending upon board complexity. The lasers utilised all operated in the UV and were used with resists having sensitivities in the 5-15 mJ/cm² range. There were said to be several resist suppliers including companies such as Shipley. LDI solder masks were also emerging but supply was rather limited because it was proving difficult to obtain the required photospeeds and exposure times were thus longer than desired. LDI offered the potential of faster cycle times, shorter set up times, faster change over to new designs, small batch handling, improved quality and dynamic registration and scaling. The need for photo tooling was removed and other advantages included uniform exposure, constant image contrast, constant-exposure energy and fine feature capability, even on large panels. A company in Japan was processing 25 micron features in solder mask using LDI. Brewster then gave details of the cost comparison factors that needed to be taken in to account when comparing LDI with conventional processing routes.

The session closed with a presentation from Dr. F. Tomaiuolo of Alfachemici in which he described the results of an SEM investigation of the topography of copper surfaces obtained using a new microetch process that had combined microetching and degreasing properties. The topography of the copper surfaces produced had been optimised to ensure good photoresist adhesion. Dr. Tomaiuolo detailed the advantages and disadvantages of brush scrubbing, pumice brushing, jet pumicing and chemical microetching. With microetching there are chemical con- sumption and waste generation issues that need to be considered. Persulfate based microetches were relatively low in cost but tended to have variable etch rates and the solubility of copper was low (15-20 g/l). Conversely, sulphuric-peroxide based etches offered lower consumption rates than for persulphate based etches and their etch rates tended to be more consistent but their costs were higher and they could produce variable topographies. The new process that was the subject of this paper was known as "Incide H-99" and combined three process steps into a single treatment stage. The product cleaned, microetched and gave a light passivation to the copper with no subsequent sulphuric-based treatment as was required with persulfate-based microetches. It gave a very high and stable etch rate, contained no complexants and worked at room temperature. Although the new process offered significant advantages over conventional microetches, it was not compatible with all solder masks, was adversely affected by chloride ions and attacked titanium.

Neil Patton, of Atotech Deutschland GmbH in Berlin, Germany then detailed the improved benefits and versatility for PCB manufacture gained by re-engineering a conductive polymer system. He described the original conducting polymer process which utilised the acid catalysed polymerisation of pyrolle in the presence of manganese dioxide. This was a very elegant and short process but one issue for some users was the need for high temperature adhesion promotion stage. With a pH of 3.5 and an operating temperature of 90°C, this stage required the use of stainless steel process equipment. In later manifestations of this process, such as the "Compact CP" and "Seleo CP" processes, a new monomer based on thiophene was used. In one example, this was used in a microemulsion form that had a pH of 1.5 and operated at room temperature. The latest processes were environmentally friendly (as they contained no chelates or formaldehyde), short, selective (with excellent copper to copper adhesion) and had been production proven for the manufacture of microvias.

Andy Cobley, a senior R & D chemist from Shipley Europe Ltd in Coventry, England (see Plate 2) gave an interesting review of printed circuit board surface finishes for mobile telephone applications. In his presentation, Andy began by reviewing the current and predicted proportions of the total market taken by the main planar surface finishes currently available. He then detailed some of the specific property requirements that were necessary, both for surface mount applications in general and then specifically for mobile phone applications. As mobile phones moved to higher operating frequencies, the importance of finish electrical conductivity was predicted to become increasingly important because more of the signal would be carried in the surface of the coated conductors. Examples of the main surface finishes were given and their relative advantages and disadvantages discussed.

Plate 2 Andy Cooley of Shipley Europe Ltd

Finally, Mr. H. Ogawa, the Director and Engineering General Manager of the Noda Screen Company in Japan, gave a presentation entitled "Interconnect technology by microvia filling for PCBs". In this paper, Mr. Ogawa described a new connecting technology for PCBs known as the YUUTEI process. He introduced the latest technologies such as stacked via structures using through hole plugging and described the YUUTEI process which was used for microvia filling or levelling in a method simulating the Damascene process. Although the process was simple in concept, filling very small microvias presented a technical challenge that had required the development of a special process using filling materials based on resin paste, conductive paste and a "metalize" paste. The process sequence comprised four basic stages; cleaning the via, screening the paste, curing the paste and finally polishing to give a planar filled microvia. Variations of this process were described for different applications and the properties of the pastes reviewed.

Overall, this was a very successful conference with a good attendance and broad representation from much of the European PCB industry. The varied content throughout the 2 days of presentations was of a consistently high quality and the EIPC is to be congratulated for organising such an interesting and useful programme, particularly in these very difficult times. The proceedings of the conference are available from the EIPC and more details can be found at www.eipc.org

Martin Goosey May 2002