EIPC Summer conference

Citation

(2007), "EIPC Summer conference", Circuit World, Vol. 33 No. 3. https://doi.org/10.1108/cw.2007.21733cac.004

EIPC Summer conference

EIPC Summer conference

Edinburgh, 14 and 15 June 2007

Edinburgh, historic capital of Scotland, its skyline dominated by a castle set on the crags of an ancient volcano, a city rich with Georgian and Victorian architecture and winding medieval streets, was the venue for the EIPC Summer Conference 2007.

Summer? Visitors from mainland Europe might have expected Edinburgh in mid-June to provide a bit of sunshine. Wrong! According to Encyclopaedia Britannica (which originated in the city in 1768), Edinburgh has “very unpredictable weather” and the average June rainfall is 50mm. Most of it fell on the 14 and 15, but that did not dampen the spirits of the many delegates to the conference. Sixteen countries represented, six sessions of presentations spread over two days, 20 papers in all, as ever with the smooth and professional organisation which is characteristic of the EIPC team (Figure 6).

Figure 6 The speakers at the EIPC summer conference in Edinburgh

Retiring Chairman Paul Waldner opened the proceedings, thanking EIPC and its members for their support and declaring his belief that the European PCB industry, although significantly changed in size and shape over the last decade, was in fit and healthy condition. Paul declared his confidence that the institute would go forward in capable hands as he introduced long-term board member and leading PCB fabricator Rex Rozario OBE, the newly elected Chairman. Rex welcomed participants to the conference and urged the European PCB industry to work together as team players. Global co- operation would be a challenge for the European industry to tackle in coming years and the EIPC would continue to offer a platform to help PCB fabricators in Europe to maintain their position in a world market.

In the management update session, Walt Custer had sobering statistics to deliver, although he predictably brightened-up his presentation with aptly captioned candid-camera shots and cartoons. The message was that, although 2006 had been a reasonably good year globally, worldwide PCB growth had slowed in 2007 and significant increases in the costs of energy, metals and other materials remained big concerns. Price increases to offset cost increases had been sporadic and challenging. Using semiconductor shipments as an indicator, Western European PCB volumes were predicted to experience a downward trend through 2007, although a positive cycle would resume in 2008. China's PCB production had grown much faster than the world average, but its 20 per cent year-on- year expansion could not be sustained indefinitely, and would ultimately be limited to the 8-10 per cent growth in global electronic equipment. India, Vietnam and Central Europe were emerging as PCB producers, although PCB production in Central Europe lagged behind EMS activity. Western Europe and North America shared the characteristics that the majority of volume production had been lost and a few large, global players remained, together with many lower-volume, high mix, “protected-market” suppliers.

Very relevant to Rex's encouragement of co-operation and Walt's comments about smaller, specialist PCB manufacturers, was the presentation from Anthony Walker of RTC North in the UK. He explained what were the opportunities for small-to-medium enterprises (SMEs) to become involved in the EU's 7th Framework Programme (FP7), a mechanism for funding research and technological development. e50 billion would be made available between 2007 and 2013 to support the creation of new knowledge, improve competitiveness, resolve societal issues and develop the European Research Area. And 15 per cent of this funding would be available to SMEs. He invited interested delegates to join a workshop session to understand how to access EU funding for collaborative R&D, and how to build a consortium and to prepare a successful project proposal.

The session on advanced PCB fabrication technologies began with Dennis Price of Merlin Circuits in the UK describing a break with convention: using mechanical rather than laser drilling techniques to produce high- aspect-ratio microvia holes. NC drilling of micro-vias gave advantages of improved registration and consistent shape, with a significant improvement in long-term reliability. Any cost penalty was minimised if the technique was restricted to the maximum-density side. Merlin expected to be able to offer aspect ratio three by the end of 2007, and aspect ratio ten was considered achievable using “megasonic” plating technology, being developed in a collaborative project with Heriot Watt University in Edinburgh and Greenwich University in London. By variable- depth drilling, sequential build-up could be avoided, and the concept was complementary to Merlin's business in small volume high-reliability circuits.

Continuing the theme of high packaging density, and the cost- effective maintenance of high-speed signal integrity in a context of high currents and power dissipation, Happy Holden from Mentor Graphics in the USA described a new software tool which allowed the PCB design engineer to predict system performance and to simulate alternative packaging approaches and material options, based on critical path analysis. He reported a case study where this software had enabled a reduction in size and cost of a new multilayer board, operating at 10Gb/sec in an avionics application, from 18 to 10-layer. It was anticipated that in future the use of HDI and embedded passives in complex boards and systems would be greatly facilitated using these principles.

Developments in HDI semi-flex PCBs were described by Tarja Rapala- Virtanen from Aspocomp in Finland. Aspocomp have been active in rigid-flex manufacture since the late 1980s, and saw the semi-flex concept, where the flexible component is a surface layer rather than an inner layer, as having several advantages, particularly that processing was compatible with standard rigid and established build-up processes, and constructions were cost- effective from the materials standpoint. Although the concept was unsuitable for dynamic applications, the intended applications were flex-to-install, taking advantage of space saving and the elimination of connectors, so this was not a problem. Single and double HDI flex layer designs had been successfully manufactured and had passed comprehensive reliability testing. Aspocomp could offer design guidelines to their customers, and Tarja emphasised that the key to success was early involvement and cooperation along the supply chain.

Solderable surface finishes was the topic for an interactive panel discussion. Short introductory presentations from Kenji Nishie of MEC in Japan, on new OSPs, Dave Wayness of Rohm & Haas in England, on ENEPIG, Frando van der Pas of Cookson Electronics in The Netherlands and Alan Hanson of MacDermid in England, both on immersion silvers, and Bernhard Wessling of Ormecon in Germany, on organic nanometal, were followed by an open question-and-answer session with a healthy level of audience participation. There was a very constructive interchange of information and opinion, although because of time constraints not everyone was able to raise their specific issues for debate. It was agreed that solderable finishes was such a broad and controversial subject that a full-day workshop would be justified.

Beginning the session on design for manufacture, Martyn Gaudion of Polar Instruments in the Channel Islands discussed the management of layer stack-up information across the supply chain. Using a series of typical, real-life illustrations of badly presented, incomplete, ambiguous and generally unintelligent attempts by designers to specify their requirements, where the PCB pre-production engineer is expected to be clairvoyant, he proposed a solution for communication using open XML format to define the stack-up information and a free-issue viewer to allow the data to be imported, edited, shared and exported in an industry- standard procedure. This was especially relevant where the fabricator was remote from the designer, as in the case where product is sourced through brokers from Far Eastern suppliers and the consequences of poor information were potentially very costly.

Mick McAtier of 3M in the USA demonstrated what could be achieved in improving electrical performance and reliability whilst reducing board size and cost, using an embedded capacitor material consisting of two copper foils separated by an ultra-thin high- dielectric constant material. Embedded capacitance was much more effective at high frequencies than surface mounted discrete components, and noise levels were greatly reduced. He showed examples of novel uses of the material in flex circuit and IC packaging applications. Combined resistor- capacitor material was giving promising results in further improving electrical performance and reducing board size.

Uwe Altmann of Orbotech in Belgium described how direct imaging could be used as a production technique to address critical resolution and registration requirements as the leading-edge of the industry faced the challenges of solder mask exposure on 0.3mm pitch BGA designs. Conventional processes could achieve 50m solder mask clearances, but these new designs were characterised by 40m lines and spaces and 20m clearances. All of the principal suppliers of solder masks had now produced materials with 50mJ sensitivity which could be production-efficiently exposed by LDI whilst remaining processable by traditional contact printing. An increasing number of PCB fabricators were taking advantage of the facility to use a single coating line and solder mask material but to choose the exposure method according to the design technology of the job.

The opening presentation in the session on advanced plating came from Giacomo Angeloni of Somacis in Italy, and was effectively a wake-up call to materials and process suppliers to recognise the manufacturing requirements of European printed circuit fabricators, whose production was typically small-batch, high mix: complex, fine-line, high density, on a wide range of substrate materials. In many cases, it was no longer possible to use a general-purpose process for a particular function and a number of different chemistries might be required. As an example, he described how different grades of FR4 laminate behaved in de-smear processes. It might be expected that high- temperature and halogen-free grades had different chemical resistance, but there was evidence that nominally- standard FR4 showed significant variation supplier-to-supplier, and there was an urgent need for homologation of materials.

A second example was acid copper electroplating, where the conflicting requirements of through-hole plating and via filling often demanded separate plating lines, for which the small-batch manufacturer had difficulty in justifying capital investment.

Stephen Kenny, of Atotech in Germany, offered a solution to problems of copper thickness distribution, using horizontal panel plating with inert anodes. Using a segmented anode design and modified pulse parameters, latest developments enabled the filling of blind micro-vias of typical 100m diameter and 70m depth whilst depositing only 15m of copper on the surface. The process offered a route to achieving 50m line and space with filled vias, together with savings in the consumption of copper and etchant, and had already reached a high level of acceptance in the mass production of HDI boards.

Robin Taylor, of Atotech in England, described a novel use for a process primarily developed as a bonding promoter for copper. As micro-via hole densities had increased, there had been a trend away from the “large-window” technique for CO₂ laser drilling, for considerations of registration and reliability. Copper is normally difficult to drill directly by CO₂ laser because of its low-energy absorption. By treating the surface with the bonding promoter, its laser absorption characteristics were enhanced and CO₂ laser drilling became practicable as a production technique, giving holes with good geometry.

David Ormerod, of Cookson Electronics in the USA, responded to Giacomo Angeloni's appeal for processes with increased versatility by introducing a via-fill plating chemistry which could be straightforwardly installed as a drop-in replacement into an existing vertical plating line and could equally serve as a plating- through-hole process. The combined plating cycle could be completed in 75min. Extensive reliability studies had been carried out in co-operation with major OEM and EMS companies to demonstrate the benefits of copper- filled via-in-pad technology.

The final session focused on environmental issues and began with a presentation on flame retardants by Dr Sieghard Goebelbecker of Eurobrom in Belgium. Reviewing the status of tetra- bromo-bisphenol-a, the reactive flame retardant used in FR4 laminates, he reassured delegates that all of the EU risk assessments would be finalised by June 2007, and it had been agreed that reactive use of TBBPA presented no risks. A voluntary emissions control action programme (VECAP) had been set up in partnership with the supply chain to manage, monitor and minimise industrial emissions of commercially available brominated flame retardants. In anticipation of the REACH directive, TBBPA would be one of the first substances to be registered as a high volume substance. Since, the material had already been so well characterised, no further evaluation would be needed before registration.

Neil Stanton, of BSI Product Services in the UK then gave an update on how the RoHS directive had influenced the electronics industry since it became effective in July 2006. Compliance was not easy or straightforward, and there had been a tendency for people to focus only on lead-free and to overlook the five other defined substances: cadmium, hexavalent chromium, mercury, PBB and PBDE. The enforcement authorities were trying to take a constructive approach and work with producers rather than put them out of business. Some product had been voluntarily removed from the market to avoid prosecution and some criminal investigations had commenced. There was no official co-ordination of enforcement bodies across Europe, but an informal network was attempting to maintain a consistent approach.

Dr Andy Cobley of Coventry University in England gave the last presentation of the conference, discussing the environmental benefits of sonochemical techniques in the treatment of surfaces. Taking de-smear as an example, traditional processes were characterised by long cycle times, high temperatures, hazardous chemistry and high water consumption. Using power ultrasound, equivalent results could potentially be achieved with benign chemistry in shorter times at lower temperatures. He explained the principles of acoustic cavitation and microjetting, and showed examples of the effects of sonochemical processing on the surfaces of ceramics, Noryl and Cycolac thermoplastics and FR4 laminates. A collaborative evaluation project that was being funded by the Innovative Electronics Manufacturing Research Centre.

Outside of the conference room, there were many opportunities for delegates to network with their peers and to visit the table-top exhibits of the sponsoring companies. And as a cultural distraction from considerations of business, technology and environmental legislation, EIPC arranged a walking tour of the city, extremely enlightening for those who had brought winter attire (certain Dutch ladies bravely endured the experience and suffered only mild hypothermia), followed by dinner at the Caledonian complete with piper, haggis, neeps and tatties.