Experience with Trimming of Chip Resistors and how to Improve Trimming Results with CAD Simulation and Thick Film Process Control

Abstract

High speed chip resistor trimming requires a more advanced technology than just passive network‐trimming. Some guidelines have to be observed to obtain a good approach to the desired goal. One fast and inexpensive way of finding the best parameters for a trim cut, i.e., maximum speed and best accuracy, is CAD‐network simulation. Last but not least several parameters should be checked and controlled continuously to optimise yield.

Citation

Ronniger, R. (1986), "Experience with Trimming of Chip Resistors and how to Improve Trimming Results with CAD Simulation and Thick Film Process Control", Microelectronics International, Vol. 3 No. 1, pp. 40-43. https://doi.org/10.1108/eb044214