Microtech 2006, iMAPS UK Technical Conference, Moeller Centre, Cambridge, March 7 and 8, 2006

Citation

Ling, J.H. (2006), "Microtech 2006, iMAPS UK Technical Conference, Moeller Centre, Cambridge, March 7 and 8, 2006", Microelectronics International, Vol. 23 No. 2. https://doi.org/10.1108/mi.2006.21823bac.001

Microtech 2006, iMAPS UK Technical Conference, Moeller Centre, Cambridge, March 7 and 8, 2006

Microtech 2006, iMAPS UK Technical Conference, Moeller Centre, Cambridge, March 7 and 8, 2006

Keywords: Electronics industry, Conferences

Day 1 – March 7

A warm welcome on a drear chill Spring day from Peter Ongley, the iMaps UK Chairman, who went on to introduce the exhibitors, who each gave a short introduction to their companies, who included Nanix, Indium Corporation, RF Modular Optical Design, Low Point, Sandvik Osprey, ENCASIT, Ansoft Techcraft, Novacom Microwave, NTK, Insato, MicroSystem Engineering and PandA Europe

TechSearch International had sent along Jan Vardaman to give the key note speech, which was entitled New Drivers for Growth in SiP. The system in package is the realisation of an MCM and an MCP dream, she said, and a product driver is finally here, SiP is the driver for most of our advanced packaging requirements, it is wireless communication, it is the mobile phone, and ten years from now it will be something different. It was not a technology push; it was a market pull that gave birth to the SiP.

What is a SiP? Basically it can include stacked die packages, multichip packages, and stacked packages, and one of the drivers is greater functionality in a smaller area. High performance meets the demands of the PC, telecoms, and military aerospace sectors, and there are some applications in the medical field. So who asks for a SiP? Those concerned with miniaturisation, those looking for EMI protection.

She looked at Amkors PoP, and Intels Folded Stacked Configurations, which involved stacking CSPs in a very thin packing solution. She showed Intel's SiP in the Motorola, and of course Sony has made some tremendous developments, they moved from wire bond to flip chip which gave them a 56 per cent reduction in package size. Sony like system integration, and work closely with all their suppliers in this regard.

So we now have a PiP – a package on package. It is a stacked module package, it allows more flexibility, and allows memory to be fully tested before assembly. Qualcomm have PiP in production in their systems, and subcontractors include Amkor.

SyChips SiP IPD is tiny, used in Apple's iPod, this is pretty amazing as well, it contains SDREAM, which is a processor, a memory controller, a switching regulator, it is power management, etc. all in a miniscule module. Cisco can now, by using a SiP, drive the complexity from the PCB to the module, thus with a smaller footprint of high-end wiring, with a potential for reduction in system boards through reduced layer counts.

What does the future look like? We are moving towards Systems/Integration Territory, which is one to watch. Drivers? – greater functionality, high performance solutions, enabling layer count reductions in equipment PCBs, and 3D integration will be driven by performance. Different configurations? Planer with no die stacking – stacked die inside package – and package stacking. Growth will be in mobile phones, computers, military aerospace, automotive, industrial applications and home appliances, telecoms and network systems, not forgetting computers.

Hardly surprising that there were so many questions from a seriously involved audience.

Nick Chandler from BAe Systems told us about his experiences with 3D SiP, and technology improvements for volume manufacture. These are bare die stacked circuits containing mixed components and formats, they are multi-chip, multi-level, and very rugged. The Vifor Project and its objectives were to develop module technology combining the advantages of SiP integration with vertical integration. Working with Solectron, 3D Plus, IXL, and Centro Recherece Fiat, BAe knew about the problems – the circuit boards for 3D stacks are larger than the final cube, so the tracks are cut at the edges of the cube to provide connections between the boards, the dielectric is exposed at the edges of the cubes and can provide a potential leakage path.

Andrew Holland from RFMOD came to talk about QFN packaging innovations.

Quad flatpack no-lead (QFN) construction was illustrated, along with two types of singulation – stamped out or sawn. Array densities are the key to lowering final costs as well as materials. QFN is near chip scale, has simple construction, good thermal characteristics, is available in many standard sizes, has low electric parasitics, (R, L and C), and essentially it is low cost. The market – 12 billion devices sold, since 1998 when it was developed. Fastest growing type ever, he claimed, and by 2010 there will be a demand for 30 billion devices. The key driver? Wireless communication, power management with semiconductors. All the leading sub-contractors and OEMs use QFNs. Limitations? Pad density, pad pitch. Metal spacing is limited by thickness, but new solutions offer multi-row manufacture with a low profile, 0.5mm high. There will be a limit, of course.

Key issues faced by SiP designers included size, cost function density, including electrical performance, thermal performance, and passive component integration.

Component integration/EMI and reliability are two others. RFMOD have the first QFN package with upper and lower grounded pads. It has an integrated EMI shield, an interconnected double pad heatsink, it comes with an integrated inductor/ antenna option, is suitable for single chip or SiP stacks, it maintains the standard outline of QFN, it has a low profile, and has options for a camera module.

Camera phones – Andrew said that by 2008 the market will be for 350 million of them, so RFMOD will be busy. Established in 2004, they are based in Cambridge, and their field is microelectronic packaging technology. They have target markets, including technology transfer, in which they provide design and fabrication, addressing SiP thermal and EMI shielding needs at the device level.

The afternoon brought along a Market Watch session – John McNicol kicked off by talking about a company called Intarsia, who were rather good at putting thin film on glass, along with the smallest Bluetooth RF module in the world. So why did they close? John knows all about start-ups. His company has the footpath, which has the signs – market research – finding customers – business planning – due diligence – sourcing finance – all the essential steps. He talked about set squared – involving Bath, Bristol, Southampton and Surrey Universities, which covers all sorts of technologies, and one called Silicon South-West. They provide design tools working with iNEMI, Mentor Graphics. Working with universities is an experience on its own, it is quite hard to find the right people, some have the expertise, and some think they have, and it is down to you to find the difference. The ones who do, are hard to work with, they are usually too busy.

Some issues to look out for are:

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  confidentiality;

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  ownership of IP; and

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  unrealistic expectations and costs.

Some schemes to look at are:

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  KTN – knowledge transfer networks;

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  Faraday partnerships; and

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  KTP – knowledge transfer partnerships.

External investment – here the Government will underpin a small firms loan guarantee. The DTI offer a R&D grant, And there is always regional assistance. There are also the angel investors – a networking activity, but you need to find them. Venture capitalists? Ah yes, there are some 154 VC's interested in electronics and the like in the UK. VC investment in the UK last year was some £500 million, and their shareholders are perfectly happy.

Power and heat handling are the target fields for electronics in the next two years, and 4G terminal networks will make huge demand on technology. There are four key elements to any new venture – a great idea first, then a customer, then the team, and IP, a distinctive IP, well, that came last (Plate 1).

Plate 1 Microtech 2006, Chris Smith of NWML and Dr Chris Hunt of the National Physical Laboratory

Chris Smith from the NWML came to talk about RoHS. These regulations apply only to products placed on the market; there is no requirement for any declaration of conformity or CE. But there is a requirement for products to comply, and a requirement for evidence. There will be penalties, naturally, some £5,000 at a Magistrates Court, and unlimited at High Court. Belgium has the worst penalties, surprisingly. There are exemptions, which are neither included in the UK regulations, nor in the directive. NWML policy is to follow Commission FAQs and DTU guidance. Enforcement Policy is based on intelligence and risk, and based on compliance through co-operation. They are looking for a “clean” UK. Their general approach will include a risk matrix, sampling based on risk, they will ask for evidence and can work with the honest manufacturer.

Top questions:

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  Is there a transition period? No. It ends on July 1.

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  Is RoHS delayed? No.

It only applies to products going on to the market in the EEA. This means that it is on the on the market when it is available for sale on the warehouse shelves of the seller, not the manufacturer. Imported products also have to comply. It is important to educate your marketing and sales departments. Working with BSI and SGS on kitemarks, and they are working on EU co-operation throughout Europe on regulations Useful website is www.rohs.gov.uk

“A flexible future” was the title of a paper from Aubrey Dunford, of AFDEC. Apparently, someone had the temerity to ask what the difference was between TAM and DTAM some time back, so Aubrey explained. It hinges around the flow of components from manufacturers to the end-user. If it goes direct its TAM, if it goes through a distributor it is DTAM. So there we have it.

The UK component market is no longer driven by consumer electronics, the key market driver now is systems and infrastructure. We are thus becoming more dependent on the underlying state of the economy than in the past. As an example, the forecast in October 2004 was for 3 per cent growth, but the actual was 1.8 per cent. The year 2005 was a poor year, and inflation does not help, it is creeping up, and higher oil prices will keep inflation up. The year 2005 was another year of decline. The market dropped by 13.9 per cent, but distributors did rather better than direct sales. UK market for components is £4 billion. Production moving from the UK to Eastern Europe and the transfer of production has continued longer, and deeper, than many expected. How about 2006? More of the same, it seems, it will decline by 5 per cent; the UK has suffered more than others, there has been a shift in purchasing as well as manufacturing, and there is a development in expertise in Eastern Europe. Electronics components distributors are diversifying, into embedded software, system level boards, and component assemblies' modules. But new opportunities abound – electronics in the UK is growing, in the realms of medical, security, wireless, energy control, intelligent lighting and heating systems, energy saving, and there is huge growth in the automotive industry. Flexible? Yes, in our thinking (Plate 2).

Plate 2 Delegates at Microtech 2006

Professor Ian Philips came from ARM-ELC, and talked about commercialising knowledge. ARM- ELC supply intellectual property and he has been involved with the DTI on the production of their EIGT Report, which showed that the UK electronics industry was valued at $1.2 trillion in 2003. The trouble is that we do not know enough about the nature of the UK electronics industry anyway; SIC codes hides the nature of the industry, much is hidden, but the survey found that there are 10,000 enterprises generating £21 billion of sales. It is not a market sector; it is infact an enabling technology. The government, therefore, recommended the formation of the ELC – the Electronics Leadership Council, to help develop the UK electronics industry. Its responsibility is to increase awareness, to tackle the EIGT recommendations, and to help TSB and DTI with a technology strategy.

“More than 90 per cent of innovation predicted, across all sectors, will be through the increased use of electronics”. Electronics means design, manufacture, support, and end of life. Business models make money, good businesses are moneymaking machines, and they do not take unnecessary risks. In the high tech world, business are find that 50 per cent of revenue comes from products they knew nothing about five years ago. It can take time to move from science to capability.

Good ideas do not always get funded. Try not to want funding; it is better to use what you have. There is a huge opportunity through better integration of the UK electronic industry. Disruptive business models arise when evolution stalls. Is evolution the daughter of invention? If so, are we innovative enough?

We do need more science graduates, certainly, we encourage the growth of start-up companies, they all require a good science base, and they need science graduates. The key is to promote science at school level. Industry goes where it can get the skills, and this may not necessarily be in the UK if we do not educate our children properly. The mood was quite clear about where the future lay – we need to promote and encourage children to come into science.

Chris Bailey from the University of Greenwich looked at the design and simulation challenges for SiPs. Integration is the key word now, and a SiP is any combination of semiconductors plus optionally other components such as passives, MEMS and optical components in one package.

The various “waves” of new technology were shown, Chris suggesting that the nano technology wave will follow the SiP wave, no doubt. He compared the advantages and disadvantages of the system on chip vs system in package, and what we are looking at is the best of both. A vision for the future was shown, involving many technologies, high wiring density – embedded waveguides – design flow. A more integrated approach to design is now apparent, the physical design, or architecture, has to be considered, one needs to look at substrates – laminate, flex, ceramic, can they take embedded passives? Do I need a low cost high- density substrate? Consider the interconnects.

Physically it is now 2.5D or 3D, not 2D. For structures on high density boards there are a number of analysis tools available, from companies such as ANSOFF, CST, Microstudio, etc. Thermal design is to be a massive issue in the future. SiP has multiple heat sources; it has lots of interfaces, which involves cooling technologies, possibly air-cooling? Board conduction – is it enough? Maybe other techniques, such as spray cooling. Thermal analysis can be done with the DELPHI approach.

Design for reliability, modelling and accelerated life testing to failure to provide an understanding here.

SiP – the need here is for co-design. It is a joined up approach, with all parties involved.

Electronic design formats – there are far too many, and it is a hugely complex matter. Integrated analysis in design is now going on in the market. At Greenwich, they have worked on a micro-engineered stencil for fine pitch work, and Chris explained how they measured solder creep energy density accumulation.

Future challenges include integrated design tools; finer pitch assembly materials and technologies; thermal management materials and technologies; known good die; and most of all – reliability.

Day 2 – March 8, 2006

Piers Tremlett from Zarlink Semiconductor talked about SiP in Vivo. Electronic devices can be implanted into the human body, which help control things, such as incontinence. Such electronics defy age and infirmity. Electronic implants include hearing, heart pacemakers, insulin pumps for diabetics, implant on nerves controlling foot movement, a device that can go right into the ear is a tiny package in its own right. A pill containing a camera capsule, which can photograph every minute as it passes through the alimentary canal, which endoscopy cannot do. A pacemaker can run for seven years on one battery, and the first man to have a pace maker fitted lived for a further 48 years. Interesting application stories, all of them (Plate 3).

Plate 3 Delegates at Microtech 2006

Why do SiPs suits implants? Space requirements, modularity, low power usage, small volumes not a problem. Zarlink developed a medical SiP from a telecom SiP, with better performance, reducing size. Their Ultra Low Power Radio chip allows doctors to monitor pacemakers in a patent on a wireless basis. Future SiP will make greater use of flipchips, new packaging techniques inc. embedded components, and with an increasingly elderly generation the company has a bright future – the future is silver!

Anna Fontanelli from Mentor Graphics informed the conference about design tools for SiP applications. SiC and SiP are both emerging technologies, and in the communications and computer sectors, the demand will be for 30 million gates by 2008, which is something of a blessing for designers. $1.5 billion is the cost to the industry of design, much of it in verification. Handheld industries will drive SiP, using off the shelf ICs and smaller components, with increased functionality. To help reduce this cost, Mentor Graphics have a plan to assist.

The physical design of a SiP is very complex; stacked dies add complexity, and embedded passives are increasing in popularity. Pin counts are growing, wirebond is dominating chip connect, and speed dictates the use of flipchips anyway. 3D wire bonding is used wherever possible, which raises further challenges for the designer (Plate 4).

Plate 4 Discussion at Microtech 2006

A new wiring technology called XWire is emerging to assist the designer, and Mentor Graphics show how they can wire bond a complete stack simultaneously using this method.

How SiP is going to enable novel MEMS based products was a subject aired by Dr Kevin Yallup from Technology for Industry Ltd. Kevin is the Technical Director of TFI, and he is keen on MEMS technology. There are whole new markets out there. MEMS are micro electro mechanical systems, built on all sorts of materials, usually built on silicon, and they can be used as sensors, actuators, power scavenging devices, and components, RF filters, etc. A MEMS turns a motion into a capacitance, and they have been very successful in the automotive field, there being on average 10 MEMS/car, used for air bags, in engine management, and they are now spreading into the consumer world, and into mobile phones, and being used for sensing on small scale in industry, and in the medical world, usually performing one primary function. Future for MEMS? Well, more than Moore, in a sense, with increased functionality, for example, to operate a zoom lens in a mobile phone, as sensors in phones, they can be used to make rooms “intelligent”. The military are very keen on sensors, “Smart Dust” scattered over a battlefield can feed back a lot of information. Market requirements – increased functionality, smaller, faster, cheaper, lighter, more reliability and faster time to market. So how to meet this demand?

SiC is a real driving force now, and system on a chip has had limited success in MEMS for various reasons, one being that as complexity increases so does cost. However, a SiP offers a high level of flexibility, it can optimise the performance of each device, and it is very cost effective. A SiP is more cost effective than a SoC; the SiP is now emerging as the solution for future silicon products, being able to accommodate multiple chips of different types in one package. MEMS do need dedicated pick and place machines, placement accuracy is critical, ^1m being a typical requirement. Stress from the package can affect the MEMS die. SoC unlikely to deliver a cost effective solution for inc. functionality. The SiP will enable cost effective multi-device MEMS products to be manufactured, and the development and deployment of advanced packaging will be a key driver for commercialisation of MEMS devices.

Walter De Raedt came over from IMEC in Belgium to talk about RF SiPs. He is a designer, so he knows a bit about it. RF is a rapidly increasing application area as wireless becomes standard in many aspects. Walter looked at the SiP requirements, including the technology platform as well as modelling and design considerations. The features of a good design library were demonstrated, his company have made well over 100 models characterised by S-parameter measurements. One such was a thin film on glass spiral inductor, another was a multilayer thin film with integrated passives, 7 × 7 mm and fully operational. He illustrated examples of the design of a shunt switch, a tunable capacitor, on-wafer MEMS packaging, and how RF-SiP technologies can be applied to hybrid integrators, and active and passive MEMS.

David Flynn from Heriot-Watt University gave a paper on the development and testing of microscale magnetic components. David is a PhD student, and this is his project. Better, cheaper and faster power solutions are always required (where will it all end?) by the OEMs, communications, military aerospace applications and computer peripherals are asking for high frequency and high density and high efficiency DC/DC power requirements. David covered the factors driving the market, and described how they are using high saturation flux in order to obtain high saturation current in the magnetic cores; high permeability leads to high inductance, and high resistivity is there too. His microscale magnetic components was constructed on to a glass wafer, with a Ti/Ni seed layer deposited, then a positive photoresist applied, which was given a UV/LGA exposure, then developed used to expose pattern on wafer, which was electroplated using copper or nickel. In house alloys outperformed commercial alloys, high power density requires consideration of the depth effects, i.e. laminated corer with minimal turns. What is now required is integration into a commercial manufacturing process.

Dr Hans Burkard came over from Hightec MC AG Switzerland to tell us about ultra-thin highly flexible cables and interconnections for low and high frequency. HiCoFlex, he calls it.

The process was described; substrates are glass or ceramics, then a separation layer is applied, of proprietary characteristic, then a polyimide layer is applied, there follows a deposit of the first metal layer, then a sputtering of a titanium/copper alloy, then comes electroplating with copper/nickel. Then a second polymer layer, more metallization, final polymer layer and all on a rigid substrate, once released it is of course flexible. It is a dynamic flex material over one million bends surpassed. They have examined a long list of materials for this process, with outstanding results. They have shown that the RF performance of the polyimide in dry conditions is in excess of 20GHz, and up to 40GHz.

Finally, Dou Zhang from the School of Engineering at the University of Birmingham shared his experiences on the fabrication and the characteristics of Barium Strontium Titanate ferroelectric thick films on LTCC substrates for microwave applications. This work is applicable to tunable filters, phased arrays and steerable antennas. A composition of Ba0.70Sr0.30TiO3 was chosen for the fabrication of BST thick film capacitor test structures due to its high tunability at room temperature. The tunability and figure of merit at 2- 3GHz were found to be strongly dependent on the sintering temperature of the BST films. A capacitor test structure with BST70/30 films sintered at 1,260°C show the best performance with FOM of 548/DB at 2GHz, however, slight increase of sintering temperature above 1,260°C leads.

Next year the iMAPS Conference will be held on March 6 and7, and is to be entitled “Advanced Interconnection”. Venue to be advised.

J.H. LingAssociate Editor, Microelectronics International, March 8, 2006