SSTC – Soldering Science & Technology Club, Summer Conference 2004, National Physical Laboratory, Teddington, Middlesex, 15 June

Citation

Ling, J. (2004), "SSTC – Soldering Science & Technology Club, Summer Conference 2004, National Physical Laboratory, Teddington, Middlesex, 15 June", Soldering & Surface Mount Technology, Vol. 16 No. 3. https://doi.org/10.1108/ssmt.2004.21916cac.005

SSTC – Soldering Science & Technology Club, Summer Conference 2004, National Physical Laboratory, Teddington, Middlesex, 15 June

SSTC – Soldering Science & Technology Club, Summer Conference 2004, National Physical Laboratory, Teddington, Middlesex, 15 June

Keywords: Soldering, Conferences

Held in the contemporary facilities of the National Physical Laboratory, the SSTC Summer Conference, chaired by Jim Corke of Quadrics, got underway with a paper from Alan Brewin of the NPL entitled Supply Chain issues. Here Alan, after a brief recap on what RoHS and WEEE is all about (the when, the what, the why etc.) talked about the timescale issues, and one where end electronic equipment (EEE) comes soon enough in August 2005 where all such will need to be marked as RoHS compliant. He discussed the moot point on where the responsibility lies, whether it is with the producer or the distributor, the balance of opinion being that it is with the producer. Also, an implementation timetable will be needed. Remember that timescales can be affected by product lead-times, and product lifetimes. There are many considerations – if you change products, do they need re-qualification? If you rebadge a product – what then? The costs of compliance have to be allocated somewhere, but where? The producer, or the end-user? The latter seemed favourite, the customer always pays in the end.

Ian Wilding is with Henkel, who now own the more familiar Multicore name. He looked at issues relating to lead-free wave soldering. With LF there can be solder bath problems, caused by erosion from aggressive alloys, and higher temperatures; this erosion is of the baths, shafts, pumps and baffles, and there are dangers. Pitting has been noted of 3-4 mm after 2-3 months, all caused by lead free alloys, and when wave soldering machines leak, you get 500 kgs of molten solder all over the factory floor. Preheat temperatures are not changing very much, he noted, nor are solder bath temperatures so high, slightly elevated at 255-260°C. Contact times are, however slightly longer, and given the right process parameters for tin-copper alloy, one can get good results with lead-free soldering. VOC free liquid fluxes seem worthy of consideration, and his experience is that SAC alloys are better than tin copper alloys.

Ian was concerned about lead contamination, it is a real issue as one cannot source completely lead-free boards and components initially. Other issues discussed were incomplete hole filling/top side fillet formation, non random solder balling. Oxides on wave soldering are more persistent, so a higher activity flux is better here. As for use of nitrogen, this is not essential, but the addition of P can reduce drossing rate.

Bob Willis from EPS gave a customary “from the heart” presentation on lead-free fillet lifting. He talked through a number of assumptions that exist at present. Assumptions that fillet lifting occurs mainly in multilayer PCBs – No. With alloys in a wide pasty range – No. That it only occurs on PTH boards – Not necessarily. That it only happens with wave soldering – Not true, it can happen with any other system. Neither was it true that reducing pad size helps, as do resist defined pads, again not true. Bob gave some good illustrations of fillet lifting, showed some examples of testing, in which he said that to some degree it is inevitable that through hole joints don’t fail. He highlighted control and quality of PCBs, this is important, as if the copper plating is questionable then dissolution of copper during soldering may be possible. Like all good sequels, he looked forward to WEEE 2 – but what happens then? We shall have to wait and see.

Strain measurement techniques applied to solder joints came from Sail Ginger of the Open University. How do we measure these strains? Three major approaches – analytical, numerical, and experimental.

Strain measurement can be divided into two groups – Point methods, and Optical methods.

Under the latter came the use of moiré interferometry which, as an optical method of strain measurement, offers high sensitivity, high resolution and whole-field mapping, given that it will only work on flat surfaces. An alternative is speckly interformetry, or digital image correlation (DAC). Moiré interferometry can be applied to the surface by photoresist chemistry, which is exposed through coherent crossed laser beams and then developed out, under stress these images appears as a series of moiré spirals and whorls which allow for optical assessment of where stresses are taking place.

How to predict damage in thermal cycled solder joints was the theme of a paper given by Steve Ridout from Greenwich University. What causes the fatigue cracks? Mostly it is the high thermal mismatch between alumina and substrate and the cycling in use of the product. Modelling as a method of prediction is used in a number of industries, it is the most common approach to predict solder joint reliability, as it can simulate field cycles, 5-6 at a time. Temperature profiling is done at Greenwich, and Steve gave a number of graphs and images which explained the way in which accumulated strain and accumulated energy during ramps and dwells of temperature can be predicted, and how advanced modelling with FEA using constitutive law with damage is now being used by many organisations. But new models will be needed for lead-free solder fatigue; these will incorporate 3D simulation that can indicate the direction of asymmetrical crack propagation, as well. Many questions followed his paper.

After lunch Milos Dusek from NPL showed how some consideration of pad design could improve reliability. SoH=Stand of Height, and is the distance between the surface of component lamination and the pad, and it varies considerably, and he was wondering if this could be controlled by stencil thickness, They will be investigating the effects of joint shape and component solderability, and the effects of solder joint shape and volume. Component solderability is achieved by component ageing, measurement of wetting force at 2 Ns and wetting time to 2/3 of maximum wetting force. About a six months programme at NPL.

Another NPL project is the one being led by Dr Chris Hunt and Martin Wickham on reliability of electronics assemblies during the transition period to lead-free. A major project, it is being split into five phases, looking at thermal cycling, with different combinations of lead-free solder pastes, lead-based solder pastes, and so on. They will be looking at reliability tests of SnPb LF components with LF Pb and Sn-Pb solders; measurement of hot peel strengths of Pb contaminated LPF solder joints; and assessment of Pb pens for comp. A very thorough work programme, for which a summary is due to be completed by March next year.

Ling Zou at NPL told everyone about the effect of solder alloy and component temperature on solderability testing. Solderability testing with an IR system can be performed on PCB pad or component termination. You can measure the forces when molten solder wets the pad, and evaluate the ability of the surface to solder correctly. In their extensive work they have concluded that using preheat in solderability testing permits a far more realistic heating profile to be followed. Preheat also significantly improves solderability for components especially for lead-free solders.

Martin Wickham came back on to ask if conductive adhesives are a viable LF alternative? Working with TWI, NPL are looking at a two-stream project, with NPL working on isotropic conductive adhesives (ICAs), and TWI working on anisotropic conductive adhesives (ACAs). The project focuses on the use of conductive adhesives for solder joints. They have done a vast number of stress regimes; track and jumper resistances were measured, a comparison on reliability to BGAs was made, SOIC resistance was noted, shear tests done, as were drop tests, and a comparison made between ICAs and ACAs. ICAs stood up well to stress testing, and can provide a viable alternative for low-medium reliability applications. ICAs resistance to drop testing can be substantially improved with the use of a secondary adhesive. However, ACAs were not as robust as ICAs, they were more susceptible to thermal cycling and the material performance was variable. For low reliability applications ACAs are probably suitable, but ICAs have the edge.

NPL and TWI are working on effect of PCB and component surface finish on reliability of conductive adhesives, using various combinations of nickel, palladium, etc.

In the final part of a most informative and well-planned day, the subject of Impedance measurements of flux residues was covered by Alan Brewin of NPL. Current work was briefly described, on how SIR can be affected by flux and other process residues, and how low SIR can cause failures through dendritic growth. He described the NPL SIR test combs, especially designed for the job. There are flux issues now with LF, with higher temperature reflow, potentially high residue levels, fluxes being reformulated to accommodate higher boiling point materials and more stable or active acid components.

Surface Insulation Imedance (SII) is now necessary due to the majority of electronic designs that contain AC or digital systems, and residue analysis with SIR techniques all use a DC bias. Four fluxes have been used -rosin, blank, water based and glutaric. Finally, they have looked at the effects of DC bias on AC parameters, with little effects on dendritic growth between glutaric acid flex and water-based flux.

A good day for the SSTC members who attended, and congratulations to all those who made it so. Those who missed it can log on to www.npl.co.uk/ei/clubs

John Ling