Advances on high current load effects on lead-free solder joints of SMD chip-size components and BGAs

This paper aims to present a novel approach on investigating critical current densities in the solder joints of chip-size surface-mounted components or device (SMD) components and ball grid array (BGA) lead-free solder joints with the focus of via-in-pad geometries. The investigation involves a numerical approach and a physical validation with selected geometry configurations and high current loads to reveal possible failure sources. The work is a continuation of a previous study.

Current density was investigated using finite element modeling on BGA joints. Dummy BGA components, 0402 and 0603 zero ohm jumper resistors, were used, both in daisy chain setups on standard FR4 printed circuit boards (PCBs). Respective physical loading experiments were set to find effects of elevated current density at hot zones of the joints. Cross-section analysis, scanning electron microscopy and shear force tests were used to analyze the joints.

The findings reveal alterations in the joints, while the current loading is not directly affecting the structure. The modeling reveals the current density map in the selected formations with increased current crowding zones. Overall, the degradation does not reach the level of electromigration (EM)-induced voiding due to the limiting factor of the FR4 substrate.

The heavy current load affects joint reliability, but there are limitations of EM-induced failures on PCB-based assemblies due to the thermomechanical weakness of the FR4 material.

The experiments investigate current density from a novel aspect on frequently used BGA surface mounted components with modeling configurations focusing on possible effects of via-in-pad structure.