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Foil‐clips for Power Module Interconnects

H.‐J. Krokoszinski (Corporate Research Laboratory, Asea Brown Boveri (ABB), Heidelberg, Germany)
H. Esrom (Corporate Research Laboratory, Asea Brown Boveri (ABB), Heidelberg, Germany)

Microelectronics International

ISSN: 1356-5362

Article publication date: 1 March 1994

36

Abstract

A novel technology for the interconnection of bare chips in power modules is presented which circumvents the drawbacks of multiple heavy‐wire bonding as well as of reflow soldering of many single copper clips inserted into solder preforms. A piece of structured copper‐clad polyimide foil, here called a foil‐clip, is used to provide all required connections, i.e., die‐to‐die and die‐to‐substrate. Hot‐bar soldering or glueing is used for the final joining after adjustment of the foil‐clip to its land areas. Depending on the complexity of the module only a few touch‐downs of the heated tool are required for full assembly. In contrast to the well‐known TAB technique, in foil‐clip technology a copper layer is the top layer (typical thickness: 60 µm). The polyimide (PI) foil (e.g., 25 µm) is used simultaneously as insulation and solder stop layer on the die side. The contact of the photo‐lithographically patterned copper layer with the pads on top of the die and the substrate is achieved by grooving holes into the PI layer which are then filled in a subsequent step with solder or screen‐printed conductive adhesive. Via‐hole formation is achieved by light‐induced ablation. In the first stage of process development a scanning line beam of a pulsed UV excimer laser is moved across the surface of a metal mask containing the pattern to be eroded in the polyimide layer. The present paper describes the optimisation of process parameters in terms of wavelength, pulse rate and fluence variation as well as speed of the substrate displacement during illumination. In future, the use of a novel UV excimer lamp is envisaged which enables large‐area exposure and selective photoetching by using contact metal masks. Furthermore, measurements of the current load capability of the copper interconnects produced by foil‐clips are presented. With an infrared imaging system, the hot‐spot temperature was determined for increasing load current on tracks of different widths and lengths on their way down from high current rectifier diodes to DCB‐module substrates. It is shown that tracks with many squares (N = length/width => ∞) can be loaded with at least I = 22 A. On the other hand, due to cooling through the solder joints, the shortest tracks (N = 1) carry up to 128 A.

Citation

Krokoszinski, H.‐. and Esrom, H. (1994), "Foil‐clips for Power Module Interconnects", Microelectronics International, Vol. 11 No. 3, pp. 28-30. https://doi.org/10.1108/eb044543

Publisher

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MCB UP Ltd

Copyright © 1994, MCB UP Limited

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